The use of caches with microprocessors is well known. Caches are based on the principle of locality of software, which provides that when a data/instruction element is used by a microprocessor, it and its close neighbors are likely to be used again soon. A cache is a small, high-speed memory which contains the instructions and data which have recently been used by the microprocessor and are therefore most likely to be needed again.
The latest caches are static RAMs which are included on the same chip with the microprocessor. While this provides extremely fast operation, access to the cache is performed internally and is not "visible" on the pins of the chip. This structure therefore makes monitoring or diagnosing problems relating to the cache or to software executing out of the cache impossible unless special features are built into the chip.
In theory, a large number of pins could be dedicated to provide information regarding the operation of the cache. In practice, this solution is not acceptable, however, because cost and space constraints require that the total number of pins on the chip be kept to a minimum. Ideally, sufficient information could be provided on a small number of pins to permit such debugging and monitoring tools as In Circuit Emulators (ICEs) to function with the chip. ICEs can use shadow caches to emulate microprocessors having on-chip caches. A shadow cache is an external static RAM memory designed to act as an exact copy of an on-chip cache, and which can be examined without disrupting the microprocessor. For a shadow cache to operate properly, certain status information needs to be visible at the microprocessor pins.